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HW/SW approaches to accelerate GRAPES in an FU array | IEEE Conference Publication | IEEE Xplore

HW/SW approaches to accelerate GRAPES in an FU array


Abstract:

In this research, a high performance computing weather forecasting application GRAPES has been tuned onto a functional unit (FU) array based architecture. Software and ha...Show More

Abstract:

In this research, a high performance computing weather forecasting application GRAPES has been tuned onto a functional unit (FU) array based architecture. Software and hardware approaches are specifically employed to increase the data locality and data reuse to accelerate the stencil computation in GRAPES. The simulation results indicate that we can achieve a per-core average IPC of 12.3 within a 20-stage FU array processor, which has a 5.8x power-efficiency boost than the many-core processor (MCP) of a same process technology. This can accordingly slow down the increase of communication by one order in the cluster system, resulting in a 12x power-efficiency boost in all PEs.
Date of Conference: 17-19 April 2013
Date Added to IEEE Xplore: 27 June 2013
ISBN Information:
Conference Location: Yokohama, Japan

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