Abstract:
To improve the computation efficiency of application specific instruction-set processor (ASIP), a strategy of hardware/software collaborative design is usually utilized. ...View moreMetadata
Abstract:
To improve the computation efficiency of application specific instruction-set processor (ASIP), a strategy of hardware/software collaborative design is usually utilized. In this process, the auto-customization of instruction set has always been a key part to support the automated design of ASIP. The key issue of this problem is how to effectively reduce the huge exponential exploration space in the instruction identification process. To address this issue, we first formulate it as a sub-graph enumeration problem under multi-constraints, and then propose a fast instruction identification algorithm based on basic convex pattern (BCP) model. The kernel technique in this algorithm is the transformation from the graph exploration to the formula-based computations. Experimental results have indicated that the proposed algorithm has a distinct reduction on the execution time.
Date of Conference: 26-28 April 2007
Date Added to IEEE Xplore: 30 July 2007
ISBN Information: