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Cellular semi-systolic Montgomery Multiplier on finite fields | IEEE Conference Publication | IEEE Xplore

Cellular semi-systolic Montgomery Multiplier on finite fields


Abstract:

Recently, various finite field arithmetic structures are introduced for VLSI circuit implementation on cryptosystems and error correcting codes. In this study, we present...Show More

Abstract:

Recently, various finite field arithmetic structures are introduced for VLSI circuit implementation on cryptosystems and error correcting codes. In this study, we present an efficient cellular semi-systolic hardware architecture for Montgomery multiplication over finite fields by choosing a proper Montgomery factor which is highly suitable for the design on parallel structures.
Date of Conference: 26-28 June 2012
Date Added to IEEE Xplore: 23 July 2012
ISBN Information:
Conference Location: Kuala Lumpur

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