Abstract:
A novel methodology is presented to structured yield-aware synthesis. The trade-off between yield and the unspecified performances is explored along the design space boun...Show MoreMetadata
Abstract:
A novel methodology is presented to structured yield-aware synthesis. The trade-off between yield and the unspecified performances is explored along the design space boundaries, while respecting specifications on the other performances. Through the unique combination of multi-objective evolutionary optimization techniques, multi-variate regression modeling and sensitivity-based yield estimation, the designer is given access to this trade-off, all within transistor-level accuracy. Even more, a large reduction in required computer resources is obtained compared to alternative approaches.
Date of Conference: 07-07 March 2003
Date Added to IEEE Xplore: 19 December 2003
Print ISBN:0-7695-1870-2
Print ISSN: 1530-1591