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DATE panel chips of the future: soft, crunchy or hard? | IEEE Conference Publication | IEEE Xplore

DATE panel chips of the future: soft, crunchy or hard?


Abstract:

Today's electronic products are composed of an increasingly diverse set of ICs, ranging from dedicated ASICs, domain-specific ASSPs, platform FPGAs, to general-purpose FP...Show More

Abstract:

Today's electronic products are composed of an increasingly diverse set of ICs, ranging from dedicated ASICs, domain-specific ASSPs, platform FPGAs, to general-purpose FPGA's. With increasing integration, a mix of different fabrics on a single SoC becomes possible, combining ASIC-style standard cells, embedded FPGAs, mask-programmable sea-of-gates, and programmable processors. The panelists will present their vision of the fabric which will dominate SoCs in 90 nm technologies and beyond, based on industrial trends and case studies. They will also outline the key CAD tool challenges for the chosen fabric.
Date of Conference: 16-20 February 2004
Date Added to IEEE Xplore: 08 March 2004
Print ISBN:0-7695-2085-5
Print ISSN: 1530-1591
Conference Location: Paris, France

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