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Scalable hybrid verification for embedded software | IEEE Conference Publication | IEEE Xplore

Scalable hybrid verification for embedded software


Abstract:

The verification of embedded software has become an important subject over the last years. However, neither standalone verification approaches, like simulation-based or f...Show More

Abstract:

The verification of embedded software has become an important subject over the last years. However, neither standalone verification approaches, like simulation-based or formal verification, nor state-of-the-art hybrid/semiformal verification approaches are able to verify large and complex embedded software with hardware dependencies. This work presents a new scalable and extendable hybrid verification approach for the verification of temporal properties in embedded software with hardware dependencies using for the first time a new mixed bottom-up/top-down algorithm. Therefore, new algorithms and methodologies like static parameter assignment and counterexample guided simulation are proposed in order to combine simulation-based and formal verification in a new way. We have successfully applied this hybrid approach to embedded software applications: Motorola's Powerstone Benchmark suite and a complex industrial embedded automotive software. The results show that our approach scales better than stand-alone software model checkers to reach deep state spaces. The whole approach is best suited for fast falsification.
Date of Conference: 14-18 March 2011
Date Added to IEEE Xplore: 05 May 2011
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Conference Location: Grenoble, France