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Improving the efficiency of a hardware transactional memory on an NoC-based MPSoC | IEEE Conference Publication | IEEE Xplore

Improving the efficiency of a hardware transactional memory on an NoC-based MPSoC


Abstract:

Transactional Memories (TM) have attracted much interest as an alternative to lock-based synchronization in shared-memory multiprocessors. Considering the use of TM on an...Show More

Abstract:

Transactional Memories (TM) have attracted much interest as an alternative to lock-based synchronization in shared-memory multiprocessors. Considering the use of TM on an embedded, NoC-based MPSoC, this work evaluates a LogTM implementation. It is shown that the time an aborted transaction waits before restarting its execution (the backoff delay) can seriously affect the overall performance and energy consumption of the system. This work also shows the difficulty to find a general and optimal solution to set this time and analyzes three backoff policies to handle it. A new solution to this issue is presented based on a handshake between transactions. Results suggest up to 20% in performance gains and up to 53% in energy savings when comparing our new solution to the best backoff delay alternative found in our experiments.
Date of Conference: 14-18 March 2011
Date Added to IEEE Xplore: 05 May 2011
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Conference Location: Grenoble, France

References

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