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RTL analysis and modifications for improving at-speed test | IEEE Conference Publication | IEEE Xplore

RTL analysis and modifications for improving at-speed test


Abstract:

At-speed testing is increasingly important at recent technology nodes due to growing uncertainty in chip manufacturing. However, at-speed fault coverage and test-efficacy...Show More

Abstract:

At-speed testing is increasingly important at recent technology nodes due to growing uncertainty in chip manufacturing. However, at-speed fault coverage and test-efficacy suffer when tests are not robust. Since Automatic Test Pattern Generation (ATPG) is typically performed at late design stages, fixing robustness problems found during ATPG can be costly. To address this challenge, we propose a methodology that identifies robustness problems at the Register Transfer Level (RTL) and fixes them. Empirically, this improves final at-speed fault coverage and test-efficacy.
Date of Conference: 12-16 March 2012
Date Added to IEEE Xplore: 03 April 2012
ISBN Information:

ISSN Information:

Conference Location: Dresden, Germany

References

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