Abstract:
An Analog to Digital Converter Built-in-Self-Test design for System-on-Chip applications is presented. Linear and dynamic ADC test occur in parallel to reduce overall tes...Show MoreMetadata
Abstract:
An Analog to Digital Converter Built-in-Self-Test design for System-on-Chip applications is presented. Linear and dynamic ADC test occur in parallel to reduce overall test time. A ramp generator is used for linear histogram measurements and a sine-wave signal is applied for dynamic tests. The design precisely measures Hits-per-Code enabling accurate linearity test and a low-area optimal CPU operates dynamic measurements. Results demonstrate efficient silicon area overheads and lower test time capability.
Published in: 2009 12th International Symposium on Design and Diagnostics of Electronic Circuits & Systems
Date of Conference: 15-17 April 2009
Date Added to IEEE Xplore: 29 May 2009
ISBN Information: