Ultra-low-voltage driver for large load capacitance in 130nm CMOS technology | IEEE Conference Publication | IEEE Xplore

Ultra-low-voltage driver for large load capacitance in 130nm CMOS technology


Abstract:

This paper presents design of the inverter-based driver for low-voltage applications, with topology for boosting the transistors overdrive voltage. The proposed driver to...Show More

Abstract:

This paper presents design of the inverter-based driver for low-voltage applications, with topology for boosting the transistors overdrive voltage. The proposed driver topology was designed through detailed circuit analysis and optimization, and it is suitable for use in a switched capacitor charge pump. The driver was designed in 130 nm CMOS technology and verified by simulations including technology corners. Core of the proposed driver - the inverter uses power supply voltage of 200 mV. The whole boosted driver achieves a propagation delay of 9.2 ns and energy consumption of 92.12 μW for the value of load capacitor is 100 pF. Due to the low-power consumption, the proposed driver was satisfactory used in a self-powered charge pump systems.
Date of Conference: 19-21 April 2017
Date Added to IEEE Xplore: 29 May 2017
ISBN Information:
Electronic ISSN: 2473-2117
Conference Location: Dresden, Germany

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