This paper proposes dependable routing algorithms for multi-chip NoC platforms. In a multi-chip NoC platform, multiple NoCs are connected via off-chip links, and on-chip networks are seamlessly extended to a multi-chip network. Such platforms have several potential advantages in embedded systems with many cores, such as automotive control systems. One limitation of this approach is that the extended multi-chip network cannot usually preserve the full topology of the on-chip network within the LSI package, due to the limitation of number of pins in the LSI packages. Furthermore, automotive companies require the dependability against a chip fault, where the whole chip becomes faulty, in addition to the normal single component (a router or a link) fault model. This paper discusses two approaches to the dependable routing algorithms for the multichip NoC platforms, and compares their performance through Verilog simulations.