Abstract:
As the semiconductor technology advances, transistor size decreases and become more susceptible to upsets. In certain fields, such as space applications, multiple faults ...Show MoreMetadata
Abstract:
As the semiconductor technology advances, transistor size decreases and become more susceptible to upsets. In certain fields, such as space applications, multiple faults may occur at the same time. Traditional fault-tolerance techniques, such as N-Modular Redundancy (NMR) with majority voters, have been used to increase system reliability. Voters can be classified as Bit- and Word-Voters. Bit-Voters perform a bit by bit comparison, which is the most basic, simple and quick voting scheme. Word-Voters are more expensive to implement in hardware, but consider all bits in parallel to determine the final output, which increases data integrity. This paper proposes putting together the advantages of both voters by the use of an adaptable voter, which uses a voter function to group voters in sets of bits. We will explore this design space by considering multiple errors and project restrictions such as maximum error rate, number of modules, and probability of corrupt outputs, showing that in some cases the adaptable voter is better than the bit- and word-voters.
Published in: 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)
Date of Conference: 01-03 October 2014
Date Added to IEEE Xplore: 24 November 2014
ISBN Information: