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Techniques for formal verification of digital systems: a system approach | IEEE Conference Publication | IEEE Xplore

Techniques for formal verification of digital systems: a system approach


Abstract:

In this paper we describe a methodology for the formal verification of a processor using the CTL property language. Processors are important in design and verification of...Show More

Abstract:

In this paper we describe a methodology for the formal verification of a processor using the CTL property language. Processors are important in design and verification of digital systems because they have structures that represent most digital systems. Processors are programmable, have control parts, data parts and are rich in bus structure. Verification of CPU structures requires verification of data components, controllers, datapath and instruction level verification. This work uses a processor to discuss various features of formal verification. Because of generality of processors, we will be able to cover most aspects of property-based verification and properties used for this purpose.
Date of Conference: 31 August 2004 - 03 September 2004
Date Added to IEEE Xplore: 20 September 2004
Print ISBN:0-7695-2203-3
Conference Location: Rennes, France

References

References is not available for this document.