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FPGA/DSP-based Configurable Multi-Channel Counter | IEEE Conference Publication | IEEE Xplore

FPGA/DSP-based Configurable Multi-Channel Counter


Abstract:

In this paper we present a high-performance configurable multi-channel counter, suitable for many scientific applications. The counter array features 64 input channels, i...Show More

Abstract:

In this paper we present a high-performance configurable multi-channel counter, suitable for many scientific applications. The counter array features 64 input channels, is able to acquire incoming events with a pulse rate up to 45 MHz, and provides an integration window (time resolution) down to 24 mus with a 32 b counting depth. Moreover, the time resolution reaches the value of 8 mus with a 8b counting depth and 1 mus if only 8 channels are used. The collected data are both real-time processed and transmitted over a high-speed IEEE 1394 serial link. The same link is used to remotely set up and control the entire acquisition process, thus giving the system a high degree of flexibility. A small-sized and low-cost implementation is obtained with a Commercial-Off-The-Shelf FPGA/DSP-based single board. A theoretical model that immediately gives the system performance is presented. Finally, we describe the system functional test, the results of which are in good accordance with those derived from the model.
Date of Conference: 29-31 August 2007
Date Added to IEEE Xplore: 08 October 2007
ISBN Information:
Conference Location: Lubeck, Germany

References

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