The test cost reduction benefits of combining a hierarchical DFT methodology with EDT channel sharing — A case study | IEEE Conference Publication | IEEE Xplore

The test cost reduction benefits of combining a hierarchical DFT methodology with EDT channel sharing — A case study


Abstract:

This paper describes how two Design-For-Test (DFT) techniques (hierarchical methodology and Embedded Deterministic Test (EDT) channel sharing) were combined on an industr...Show More

Abstract:

This paper describes how two Design-For-Test (DFT) techniques (hierarchical methodology and Embedded Deterministic Test (EDT) channel sharing) were combined on an industrial design to reduce test cost factors such as ATPG runtime, ATPG memory footprint, and manufacturing test time as well as reduce overall DFT schedule.
Date of Conference: 09-12 April 2018
Date Added to IEEE Xplore: 31 May 2018
ISBN Information:
Conference Location: Taormina

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