In order to establish statistical design methodologies for LSI design, not only the statistical static timing analysis but also the delay fault detection and the circuit optimization are to be executed in statistical manners. In order to devise algorithms for these problems, the definitions of statistical criticalities are important, and the criticality probability of a path, which is the probability for the delay of the path to be largest among all paths, is one of the basic concepts of such criticalities. In this paper, we propose an O(nm)-time algorithm to compute the criticality probability for a given path precisely, where n and m are the numbers of vertices and edges of a given circuit graph, respectively. Then, we evaluate the accuracy of the criticality probability by comparing with Monte Carlo simulations. The experimental results show that the obtained probabilities are useful for the ranking of paths, if a given circuit does not have many equal delay critical paths.