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Digitally controlled pulse-width-pulse-position modulator in an 1.2V 65 nm CMOS technology | IEEE Conference Publication | IEEE Xplore

Digitally controlled pulse-width-pulse-position modulator in an 1.2V 65 nm CMOS technology


Abstract:

This paper presents a pulse-width and position modulator (PWPM) topology suitable for digital centric polar transmitter frontends suitable for software defined radios. PW...Show More

Abstract:

This paper presents a pulse-width and position modulator (PWPM) topology suitable for digital centric polar transmitter frontends suitable for software defined radios. PWPM enables the usage of highly efficient switching-mode power amplifiers (SMPA) and direct control of the output power. The presented first implementation of the modulator targets 3GPP and Long Term Evolution (LTE) base-stations and mobile devices operating in the bands E-UTRA frequency bands V, V I and XX. The proposed modulator generates all possible phases by a delay lock loop. A combination of two multiplexer circuits and an AND-gate allows to digitally select the wanted phase and duty cycle. The achievable phase and time resolution is 11:2° and 35 ps at 900MHz, which is sufficient for these applications. The feasibility of the implementation was verified by simulations on extracted layouts.
Date of Conference: 29-31 August 2011
Date Added to IEEE Xplore: 13 October 2011
ISBN Information:
Conference Location: Linköping, Sweden

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