In order to suppress the short channel effects and improve the scalability of transistors, FinFET devices have been proposed and increasingly adopted as successor of the conventional bulk CMOS. In this paper, we describe the characterization of a standard cell library based on FinFET, using the Predictive Technology Model (PTM) and BSIM-CMG models recently made available. RTL synthesis and HSPICE simulation results are presented to verify the correctness of the library, and performance is compared against conventional planar CMOS technology.