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A cavity channel SESO embedded memory with low standby-power techniques | IEEE Conference Publication | IEEE Xplore

A cavity channel SESO embedded memory with low standby-power techniques


Abstract:

A 22F/sup 2/ 3-transistor dynamic memory cell, based on a newly fabricated cavity channel SESO (single-electron shutoff) transistor is proposed for low-power mobile SOCs....Show More

Abstract:

A 22F/sup 2/ 3-transistor dynamic memory cell, based on a newly fabricated cavity channel SESO (single-electron shutoff) transistor is proposed for low-power mobile SOCs. The ultra-low leakage SESO device is formed above the bulk devices to yield the small cell size. With low-power techniques, this memory can achieve nearly an order of magnitude lower standby power than conventional memory. A 1 Mbyte SESO embedded memory core is estimated to have a standby power consumption of 24.2 /spl mu/A in a 90 nm process.
Date of Conference: 23-23 September 2004
Date Added to IEEE Xplore: 15 November 2004
Print ISBN:0-7803-8480-6
Conference Location: Leuven, Belgium

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