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An 18-GHz, 10.9-dBm fully-integrated power amplifier with 23.5% PAE in 130-nm CMOS | IEEE Conference Publication | IEEE Xplore

An 18-GHz, 10.9-dBm fully-integrated power amplifier with 23.5% PAE in 130-nm CMOS


Abstract:

An 18-GHz fully integrated class-E power amplifier with 10.9-dBm saturated output power, and 23.5-% maximum PAE is fabricated in the UMC 130-nm digital CMOS process. At t...Show More

Abstract:

An 18-GHz fully integrated class-E power amplifier with 10.9-dBm saturated output power, and 23.5-% maximum PAE is fabricated in the UMC 130-nm digital CMOS process. At the saturated output, the required input power level is -5dBm and PA consumes 35mA from V/sub DD/=1.5V. The amplifier is single-ended and includes a 2-stage pre-amplifier and a driver stage. A mode-locking technique exploiting the instability of driver amplifier is used to improve the drive for the gate of output stage. The mode-locking improves PAE by /spl sim/3% and reduces the required input power level by /spl sim/6dB to get same output level.
Date of Conference: 12-16 September 2005
Date Added to IEEE Xplore: 05 December 2005
Print ISBN:0-7803-9205-1
Print ISSN: 1930-8833
Conference Location: Grenoble, France

References

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