Loading [MathJax]/extensions/MathZoom.js
A 15-bit 30 MS/s 145 mW three-step ADC for imaging applications | IEEE Conference Publication | IEEE Xplore

A 15-bit 30 MS/s 145 mW three-step ADC for imaging applications


Abstract:

A 15-bit 30 MS/s three-step ADC for imaging applications is presented with a peak-to-peak signal to rms noise ratio of 84 dB. The offsets of the residue amplifiers are in...Show More

Abstract:

A 15-bit 30 MS/s three-step ADC for imaging applications is presented with a peak-to-peak signal to rms noise ratio of 84 dB. The offsets of the residue amplifiers are independently background calibrated. The ADC is realized in single poly, 0.18 /spl mu/m CMOS, measures 1.4 mm/sup 2/ and dissipates 145 mW from 1.8 V and 3.3 V supplies.
Date of Conference: 12-16 September 2005
Date Added to IEEE Xplore: 05 December 2005
Print ISBN:0-7803-9205-1
Print ISSN: 1930-8833
Conference Location: Grenoble, France

References

References is not available for this document.