Abstract:
Although I/sub DDQ/ testing has become a widely accepted defect detection technique for CMOS ICs, its effectiveness in very deep submicron technologies is threatened by t...Show MoreMetadata
Abstract:
Although I/sub DDQ/ testing has become a widely accepted defect detection technique for CMOS ICs, its effectiveness in very deep submicron technologies is threatened by the increased transistor leakage current. In this paper, a built-in I/sub DDQ/ testing circuit is presented, that aims to extend the viability of I/sub DDQ/ testing in future technologies and first experimental results are discussed.
Date of Conference: 12-16 September 2005
Date Added to IEEE Xplore: 05 December 2005
Print ISBN:0-7803-9205-1
Print ISSN: 1930-8833