Abstract:
An 11.75-Gb/s combined DFE and CDR circuit in 0.18μm CMOS is presented. The feedback path of the DFE is merged with an Alexander phase detector resulting in reduced power...Show MoreMetadata
Abstract:
An 11.75-Gb/s combined DFE and CDR circuit in 0.18μm CMOS is presented. The feedback path of the DFE is merged with an Alexander phase detector resulting in reduced power and enhanced performance. It is capable of equalizing copper cable channels with up to 12dB loss at 5.875GHz Nyquist frequency and consumes 201mW with a 1.8 supply voltage.
Date of Conference: 11-13 September 2007
Date Added to IEEE Xplore: 14 January 2008
Print ISBN:978-1-4244-1125-2
Print ISSN: 1930-8833
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