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A 1.2V, 17dBm digital polar CMOS PA with transformer-based power interpolating | IEEE Conference Publication | IEEE Xplore

A 1.2V, 17dBm digital polar CMOS PA with transformer-based power interpolating


Abstract:

Targeting for WLAN applications, this paper presents a digital polar power amplifier in a 65nm digital CMOS process, with 17dBm maximum RMS output power at 1.2V supply vo...Show More

Abstract:

Targeting for WLAN applications, this paper presents a digital polar power amplifier in a 65nm digital CMOS process, with 17dBm maximum RMS output power at 1.2V supply voltage. To reduce the out-of-band alias caused in the direct digital-to-RF power conversion, a transformer-based power interpolating technique is implemented. This also improves the average efficiency by adaptively configuring the interpolation stages. The measured power added efficiency remains between 8.9% and 12.7% over power range from 12dBm to 17dBm. The achieved power level allows for eliminating the commonly used external PA stage.
Date of Conference: 15-19 September 2008
Date Added to IEEE Xplore: 18 November 2008
ISBN Information:
Print ISSN: 1930-8833
Conference Location: Edinburgh, UK

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