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Design considerations for 50G+ backplane links | IEEE Conference Publication | IEEE Xplore

Design considerations for 50G+ backplane links


Abstract:

The constantly increasing need for I/O bandwidth push electrical backplane links to data rates of 50Gb/s and above. Although board materials have improved significantly, ...Show More

Abstract:

The constantly increasing need for I/O bandwidth push electrical backplane links to data rates of 50Gb/s and above. Although board materials have improved significantly, backplane links are increasingly limited by signal attenuation while suffering from ISI, jitter, device noise and cross-talk. In this paper we summarize these limitations, and show possible directions to cope with them in order to further extend the achievable data rate.
Date of Conference: 12-15 September 2016
Date Added to IEEE Xplore: 20 October 2016
ISBN Information:
Conference Location: Lausanne, Switzerland

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