Abstract:
This paper introduces a new architecture of a discrete-time charge-rotating low-pass filter (LPF) which achieves a high-order of filtering and improves its stop-band reje...View moreMetadata
Abstract:
This paper introduces a new architecture of a discrete-time charge-rotating low-pass filter (LPF) which achieves a high-order of filtering and improves its stop-band rejection while maintaining a reasonable duty cycle of the main clock at 20%. Its key innovation is a linear interpolation within the charge-accumulation operation. Fabricated in 28-nm CMOS, the proposed IIR LPF demonstrates a 1-9.9MHz bandwidth programmability and achieves a record-high 120 dB stop-band rejection at 100 MHz while consuming merely 0.92mW. The in/out-of-band IIP3 is +18.6/+26.6 dBm.
Date of Conference: 13-22 September 2021
Date Added to IEEE Xplore: 26 October 2021
ISBN Information: