This paper presents a series-Doherty power amplifier (PA) in 65-nm CMOS for fifth-generation (5G) millimeter-wave (mm-wave) applications. A novel series-Doherty combiner and corresponding design procedure are proposed to achieve broadband power back-off (PBO) bandwidth and compact transformer-based footprint. A lumped-capacitor-less quadrature hybrid coupler is also devised to generate quadrature signals from single-end input. The Doherty PA is implemented in a 65-nm bulk CMOS technology with a core size of 0.21 m$\mathrm{m}^{2}$. The PA achieves a 3-dB small-signal $S_{21}$ bandwidth from 21.1 GHz to 30.4 GHz and a 1-dB saturated output power ($P_{\mathrm{s}\mathrm{a}\mathrm{t}}$) bandwidth from 24 GHz to 30 GHz. The measured $P_{\mathrm{s}\mathrm{a}\mathrm{t}}$, output 1-dB compression point (O$P_{1\mathrm{d}\mathrm{B}}$), peak power-added efficiency (PAE) and PAE at 6dB-PBO are 20.0 dBm, 19.1dBm, 24.6% and 20.0% at 27 GHz, respectively. Moreover, the proposed PA tested with 64-QAM 100 MSym/s signal achieves average output power ($P_{\mathrm{a}\mathrm{v}\mathrm{g}}$) of 11.5 dBm and average drain efficiency ($\eta_{\mathrm{D}\mathrm{a}\mathrm{v}\mathrm{g}}$) of 14.1% with -25dB of EVM and -29dBc of ALCR at 28 GHz.