Low frequency noise in strained silicon nanowire array MOSFETs and Tunnel-FETs | IEEE Conference Publication | IEEE Xplore

Low frequency noise in strained silicon nanowire array MOSFETs and Tunnel-FETs


Abstract:

MOSFETs and Tunnel-FETs (TFETs) based on arrays of nanowires (NWs) with 10 × 10 nm2 cross-section have been fabricated with strained silicon on insulator substrates. MOSF...Show More

Abstract:

MOSFETs and Tunnel-FETs (TFETs) based on arrays of nanowires (NWs) with 10 × 10 nm2 cross-section have been fabricated with strained silicon on insulator substrates. MOSFET devices show near ideal subthreshold slope close to 60 mV/dec proving excellent channel control achieved by high-klmetal gate stack. As expected fundamental differences between MOSFETs and TFETs in current-voltage characteristics are observed and analyzed. Low frequency noise spectra are studied for both types of devices. The devices show different behavior in terms of noise spectral density as a function of the applied gate voltage. A Hooge parameter of α = 7.3 × 10−3 is derived for the NW MOSFETs.
Date of Conference: 16-20 September 2013
Date Added to IEEE Xplore: 22 May 2014
Electronic ISBN:978-1-4799-0649-9

ISSN Information:

Conference Location: Bucharest, Romania

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