Investigation of electrically gate-all-around hexagonal nanowire FET (HexFET) architecture for 5 nm node logic and SRAM applications | IEEE Conference Publication | IEEE Xplore

Investigation of electrically gate-all-around hexagonal nanowire FET (HexFET) architecture for 5 nm node logic and SRAM applications


Abstract:

This work investigates, in detail, the electrically gate-all-around (eGAA) Hexagonal NW FET (HexFET) which combines the high current drive of FinFETs with the excellent e...Show More

Abstract:

This work investigates, in detail, the electrically gate-all-around (eGAA) Hexagonal NW FET (HexFET) which combines the high current drive of FinFETs with the excellent electrostatic robustness of conventional Gate-All-Around Nanowire (GAA NW) FETs. We evaluate HexFET as a potential successor to FinFET for 5nm node logic and SRAM applications using first principles atomistic-based modeling, calibrated 3D numerical device simulations, and circuit-level benchmarking. From this, we conclude that the eGAA HexFET architecture offers superior performance to both FinFET and GAA NW FET for 5nm node applications.
Date of Conference: 11-14 September 2017
Date Added to IEEE Xplore: 16 October 2017
ISBN Information:
Electronic ISSN: 2378-6558
Conference Location: Leuven, Belgium

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