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Counteracting malicious faults in cryptographic circuits | IEEE Conference Publication | IEEE Xplore

Counteracting malicious faults in cryptographic circuits

Publisher: IEEE

Abstract:

In the area of testing, faults represent defects that occur during circuit manufacturing, or transient disturbances due to radiation or noise. This paper provides an intr...View more

Abstract:

In the area of testing, faults represent defects that occur during circuit manufacturing, or transient disturbances due to radiation or noise. This paper provides an introduction into the area of fault-injection attacks, that is, faults that an attacker deliberately injects into a security-critical circuit. We will explain the threats posed by fault-injection attacks, pointing out similarities and differences between “natural” and malicious faults, and detection methods and countermeasures applicable in both cases. We will describe various methods of malicious fault injection with high and low precision and discuss the necessary equipment (including commercially available solutions), as well as potential impact of such faults to system security. In particular, we will discuss the relationship of fault-injection attacks with other attack vectors and with test and measurement techniques.
Date of Conference: 22-26 May 2017
Date Added to IEEE Xplore: 07 July 2017
ISBN Information:
Electronic ISSN: 1558-1780
Publisher: IEEE
Conference Location: Limassol, Cyprus

References

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