Abstract:
As digital design moves into higher abstraction levels, chip-level communications become more complex, thus harder to consider low-level interconnection signal effects. A...Show MoreMetadata
Abstract:
As digital design moves into higher abstraction levels, chip-level communications become more complex, thus harder to consider low-level interconnection signal effects. Abstract interconnect models are required in order to be able to bring signal integrity issues such as crosstalk into the hands of the high-level system designer. Such abstraction can be based on, and back-annotated from, the existing crosstalk fault models, of which MDSI is a candidate. While MDSI, by considering RLC interconnect effects and not just RC, is an improvement over some other proposed models, its simplified adjacent line effects makes it inadequate for the newer technologies. For the purpose of back-annotating physical properties for system-level crosstalk modeling, we have developed a new model based on MDSI that we refer to as Weighted-MDSI. In this modeling, the effect of lines causing a cross-talk noise on a victim line is weighted by their distances to the victim. This paper extracts parameters of our presented Weighted-MDSI from HSPICE simulation runs. The parameters extracted as such are programmed into SystemC communication channels for high-level reliability evaluations and other system-level decision makings. Furthermore, SystemC-AMS models are considered as an alternative for adjusting Weighted-MDSI parameters, and for verification purposes.
Published in: 2019 IEEE European Test Symposium (ETS)
Date of Conference: 27-31 May 2019
Date Added to IEEE Xplore: 08 August 2019
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