Abstract:
Transaction Level Modeling (TLM) describes system on chips at a high abstraction level in which simulation is faster than the traditional design flow. TLM2 serves the des...Show MoreMetadata
Abstract:
Transaction Level Modeling (TLM) describes system on chips at a high abstraction level in which simulation is faster than the traditional design flow. TLM2 serves the designer with three distinct coding styles among which the untimed style has the best simulation speed with the lowest accuracy. In this paper, we are presenting a method of synthesizing TLM untimed descriptions directly to synthesizable behavioral description from which they can be converted to RTL. This direct mapping skips the intermediate synthesis steps and speed up the design process. We restrict our proposed method to TLM interfaces and specifically work on DMA devices as a common interface in communications sharing a common bus between a processor and its I/O devices.
Date of Conference: 09-12 October 2008
Date Added to IEEE Xplore: 20 September 2010
ISBN Information: