Abstract:
The paper deals with the fault tolerance of finite state machines (FSMs) implemented by nanoelectronic programmable logic arrays (PLAs). The paper studies a fault toleran...Show MoreMetadata
Abstract:
The paper deals with the fault tolerance of finite state machines (FSMs) implemented by nanoelectronic programmable logic arrays (PLAs). The paper studies a fault tolerant nano-PLA structure, which is based on implementing an initial FSM in a form of three interacting dense PLAs. The paper provides experimental benchmarks results for estimation of fault tolerance properties of the proposed solution. The results indicate a high efficiency of the proposed decomposition approach.
Published in: 2010 East-West Design & Test Symposium (EWDTS)
Date of Conference: 17-20 September 2010
Date Added to IEEE Xplore: 05 April 2011
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