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Automated solution for preventing design rules violations at abutment stage for standard cells synthesis flow | IEEE Conference Publication | IEEE Xplore

Automated solution for preventing design rules violations at abutment stage for standard cells synthesis flow

Publisher: IEEE

Abstract:

In this paper, we describe a way to build and explore auxiliary boundary constraints used to layout standard cells. It is required to build an electronic component of VLS...View more

Abstract:

In this paper, we describe a way to build and explore auxiliary boundary constraints used to layout standard cells. It is required to build an electronic component of VLSI chip, a standard cell, given a set of constraints: geometrical design rules and additional electrical requirements. During layout of standard cells, additional constraints are formulated to avoid possible violations at cell boundaries when cells are abutted in a horizontal row. Current work proposes a flow to compute such auxiliary rules.
Date of Conference: 14-17 October 2016
Date Added to IEEE Xplore: 09 January 2017
ISBN Information:
Electronic ISSN: 2472-761X
Publisher: IEEE
Conference Location: Yerevan, Armenia

References

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