Abstract:
This paper presents an approach to automatically generate transactors that implement TLM protocols for RTL IPs, such that the RTL IPs can be abstracted towards correspond...Show MoreMetadata
Abstract:
This paper presents an approach to automatically generate transactors that implement TLM protocols for RTL IPs, such that the RTL IPs can be abstracted towards corresponding TLM models and easily integrated inside a TLM virtual prototype. The obtained transactor is self-adaptive, since it allows plugging the target IP in the virtual prototype independently from the protocol implemented by the corresponding TLM initiator. The transactor is automatically created from the set of PSL assertions that describe the temporal behaviour of the communication protocol of the original RTL IP.
Published in: 2016 Forum on Specification and Design Languages (FDL)
Date of Conference: 14-16 September 2016
Date Added to IEEE Xplore: 20 March 2017
ISBN Information: