Abstract:
Reduction of power consumption of digital systems is a major concern especially in modern smart sensor systems. These systems are often only activated on request and thei...Show MoreMetadata
Abstract:
Reduction of power consumption of digital systems is a major concern especially in modern smart sensor systems. These systems are often only activated on request and their power consumption is therefore dominated by the idle-mode. Power reduction mechanisms such as clock or power gating reduce the activity or leakage in the purely digital circuits. We propose a novel adaptive clocking scheme that optimizes the energy demand using a fine-grained oscillator control on cycle-level. To evaluate our new approach, we analytically analyze the power consumption of the regarded system in comparison with available methods. The power of our new adaptive clocking is shown in an integrated smart sensor for capacitive measurements working in a passive wireless sensor node. Using our methods, we show that the energy demand of the example system is reduced even in the case of continuous measurements that demand for a high activity in the digital circuitry.
Published in: 2018 Forum on Specification & Design Languages (FDL)
Date of Conference: 10-12 September 2018
Date Added to IEEE Xplore: 08 November 2018
ISBN Information:
Print on Demand(PoD) ISSN: 1636-9874