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CHiMPS: A C-level compilation flow for hybrid CPU-FPGA architectures | IEEE Conference Publication | IEEE Xplore

CHiMPS: A C-level compilation flow for hybrid CPU-FPGA architectures


Abstract:

This paper describes CHiMPS, a C-based accelerator compiler for hybrid CPU-FPGA computing platforms. CHiMPS’s goal is to facilitate FPGA programming for high-performance ...Show More

Abstract:

This paper describes CHiMPS, a C-based accelerator compiler for hybrid CPU-FPGA computing platforms. CHiMPS’s goal is to facilitate FPGA programming for high-performance computing developers. It inputs generic ANSIC code and automatically generates VHDL blocks for an FPGA. The accelerator architecture is customized with multiple caches that are tuned to the application. Speedups of 2.8x to 36.9x (geometric mean 6.7x) are achieved on a variety of HPC benchmarks with minimal source code changes.
Date of Conference: 08-10 September 2008
Date Added to IEEE Xplore: 23 September 2008
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Conference Location: Heidelberg, Germany

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