Abstract:
Field programmable Gate Arrays (FPGAs) promise a low power flexible alternative for implementing parallel applications. Compared to CPUs and GPUs, they suffer from slow d...Show MoreMetadata
Abstract:
Field programmable Gate Arrays (FPGAs) promise a low power flexible alternative for implementing parallel applications. Compared to CPUs and GPUs, they suffer from slow development cycles due to the high complexity of application development and hardware incompatibilities. Towards this direction, we propose a platform-independent methodology and the supporting framework targeting efficient run-time application mapping onto FPGAs. Experimental results show that the introduced solution performs application placement and routing of multiple applications without any performance penalty as compared to state of art tools. Scalability of the framework was verified by mapping up to 73 applications per minute when it is executed on an 8 core system.
Date of Conference: 02-04 September 2013
Date Added to IEEE Xplore: 24 October 2013
Electronic ISBN:978-1-4799-0004-6