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An FPGA-based Othello endgame solver | IEEE Conference Publication | IEEE Xplore

An FPGA-based Othello endgame solver


Abstract:

A single chip FPGA-based Othello endgame solver is presented in This work. The solver includes all the hardware for move checking, disc flipping, move selection, board ev...Show More

Abstract:

A single chip FPGA-based Othello endgame solver is presented in This work. The solver includes all the hardware for move checking, disc flipping, move selection, board evaluation and alpha-beta pruning. On a Xilinx Virtex XCVW00E-6 device operating at 50 MHz, the chip can search 3.14 million Othello positions per second. The endgame chip achieves a speedup of 3.5 over an 800 MHz Pentium III machine, showing that performance similar to that of a high end microprocessor can be achieved using modest FPGA resources. By using a larger FPGA, a more sophisticated search algorithm and an improved datapath, we believe that a single FPGA based endgame solver with at least two orders of magnitude better performance can be developed.
Date of Conference: 06-08 December 2004
Date Added to IEEE Xplore: 14 February 2005
Print ISBN:0-7803-8651-5
Conference Location: Brisbane, QLD, Australia

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