Domain specific reconfigurable fabric targeting Viterbi algorithm | IEEE Conference Publication | IEEE Xplore

Domain specific reconfigurable fabric targeting Viterbi algorithm

Publisher: IEEE

Abstract:

This work presents a novel embedded reconfigurable fabric targeting efficient implementation of the Viterbi decoder within a system-on-chip device. The proposed reconfigu...View more

Abstract:

This work presents a novel embedded reconfigurable fabric targeting efficient implementation of the Viterbi decoder within a system-on-chip device. The proposed reconfigurable fabric can support constraint lengths ranging from 3 to 9, and code rates in the range 1/2-1/3.Our results demonstrate that this novel architecture has superior throughput and power consumption characteristics when compared to generic DSPs and FPGAs respectively.
Date of Conference: 06-08 December 2004
Date Added to IEEE Xplore: 14 February 2005
Print ISBN:0-7803-8651-5
Publisher: IEEE
Conference Location: Brisbane, QLD, Australia

References

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