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Efficient encoding for a family of quasi-cyclic LDPC codes | IEEE Conference Publication | IEEE Xplore

Efficient encoding for a family of quasi-cyclic LDPC codes


Abstract:

In general, encoding for LDPC codes can be difficult to realize efficiently. The paper presents techniques and architectures for LDPC encoding that are efficient and prac...Show More

Abstract:

In general, encoding for LDPC codes can be difficult to realize efficiently. The paper presents techniques and architectures for LDPC encoding that are efficient and practical for a particular class of codes. These codes are the irregular partitioned permutation LDPC codes recently introduced by the author (Hocevar, D.E., Proc. IEEE Int. Conf. on Commun., p.2708-12, 2003). Since these codes are quasi-cyclic, it is known that a simpler encoding process does exist. The paper goes beyond that basic method by exploiting other structural properties to allow for a simpler and faster encoding process, in both software and hardware. Solutions for some rank deficient codes are also given.
Date of Conference: 01-05 December 2003
Date Added to IEEE Xplore: 14 January 2004
Print ISBN:0-7803-7974-8
Conference Location: San Francisco, CA, USA

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