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3D stacking of high-performance processors | IEEE Conference Publication | IEEE Xplore

3D stacking of high-performance processors


Abstract:

In most 3D work to date, people have looked at two situations: 1) a case in which power density is not a problem, and the parts of a processor and/or entire processors ca...Show More
Notes: As originally published there is an error in this document. As submitted to IEEE the author name Eren Kursun was omitted from the document as noted here. The metadata and original article PDF remain as submitted.

Abstract:

In most 3D work to date, people have looked at two situations: 1) a case in which power density is not a problem, and the parts of a processor and/or entire processors can be stacked atop each other, and 2) a case in which power density is limited, and storage is stacked atop processors. In this paper, we consider the case in which power density is a limitation, yet we stack processors atop processors. We also will discuss some of the physical limitations today that render many of the good ideas presented in other work impractical, and what would be required in the technology to make them feasible. In the high-performance regime, circuits are not designed to be “power efficient;” they're designed to be fast. In power-efficient design, the speed and power of a processor should be nearly proportional. In the high-performance regime, the frequency is (ever progressingly) sublinear in power. Thus, when the power density is constrained - as it is in high-performance machines, there may be opportunities to selectively exploit parallelism in workloads by running processor-on-processor systems at the same power, yet at much greater than half speed.
Notes: As originally published there is an error in this document. As submitted to IEEE the author name Eren Kursun was omitted from the document as noted here. The metadata and original article PDF remain as submitted.
Date of Conference: 15-19 February 2014
Date Added to IEEE Xplore: 19 June 2014
Electronic ISBN:978-1-4799-3097-5

ISSN Information:

Conference Location: Orlando, FL, USA

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