Design of 3D FFTs with FPGA clusters | IEEE Conference Publication | IEEE Xplore

Design of 3D FFTs with FPGA clusters

Publisher: IEEE

Abstract:

The three dimensional Fast Fourier Transform (3D FFT) is widely applied in various scientific applications. Distributed 3D FFTs require global communication: this becomes...View more

Abstract:

The three dimensional Fast Fourier Transform (3D FFT) is widely applied in various scientific applications. Distributed 3D FFTs require global communication: this becomes a serious concern when strong scaling is required as in long timescale molecular dynamics simulations. In this paper, we propose a parameterized 3D FFT design that targets at a 3D-torus FPGA-based network of various sizes. Characteristics include direct FPGA-FPGA communication links, support for various internal switch designs, and use of table-based routing which saves chip area and routing cycles. We find that even assuming extremely conservative parameters, we are able to run the 16 3 FFT in 3.9μs, 32 3 FFT in 5.46μs, 64 3 FFT in 9.52μs, and 128 3 FFT in 25.72μs. These results indicate that clusters based on commodity FPGAs are likely to be appropriate when strong scaling is needed in applications limited by the 3D FFT.
Date of Conference: 09-11 September 2014
Date Added to IEEE Xplore: 12 February 2015
ISBN Information:
Publisher: IEEE
Conference Location: Waltham, MA, USA

References

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