This paper presents a method for finding efficient multiprocessor realizations of digital filters. It provides a framework for studying the tradeoffs between the sampling rate and the number of arithmetic units or processors. A simple method for determining the minimal sampling period as a function of addition and multiplication times is introduced. Also the effect of delays in data transfers on the sampling period can be analyzed for different hard-ware configurations. Some examples are presented to show the use of the method in obtaining efficient multiprocessor realizations.