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A generalized analog architecture for DCT, DST and its inverse | IEEE Conference Publication | IEEE Xplore

A generalized analog architecture for DCT, DST and its inverse


Abstract:

This paper describes a sampled analog architecture, for computing DCT or DST, using the switched capacitor principle with capacitance switching. The input sample stream i...Show More

Abstract:

This paper describes a sampled analog architecture, for computing DCT or DST, using the switched capacitor principle with capacitance switching. The input sample stream is applied to an array of capacitors and multiplied by all the DCT/DST coefficients concurrently using capacitor ratios. These capacitors are switched concurrently with the help of a switching matrix, to realize switched capacitor integrators for performing the necessary addition/subtraction. The architecture may also be used for computing inverse DCT and DST transforms. The proposed architecture is simple, regular and can be used for on-line computations, with good accuracy.
Date of Conference: 17-21 May 2004
Date Added to IEEE Xplore: 30 August 2004
Print ISBN:0-7803-8484-9
Print ISSN: 1520-6149
Conference Location: Montreal, QC, Canada

References

References is not available for this document.