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All-bit-line MLC flash memories: Optimal detection strategies | IEEE Conference Publication | IEEE Xplore

All-bit-line MLC flash memories: Optimal detection strategies


Abstract:

We are concerned with the optimal detector design for the all-bit-line MLC flash memory. We provide a channel model of the MLC flash memory, where the channel parameters ...Show More

Abstract:

We are concerned with the optimal detector design for the all-bit-line MLC flash memory. We provide a channel model of the MLC flash memory, where the channel parameters are mathematically tractable. Then we present an optimal maximum a-posteriori sequence detector. The optimal detector can be executed over a trellis whose branch metrics can be computed by using Fourier transforms of analytically computable characteristic functions (corresponding to likelihood functions). The soft-output detectors for both simple one-dimensional channel models and more realistic page-orientated two-dimensional channel models are derived. Simulation results show not only that the soft-output detector has the same hard-output bit-error-rate performance as some previously known detectors did, but that the soft-output detector outperforms previously known detectors by a gain of 0.23 dB.
Date of Conference: 10-14 June 2014
Date Added to IEEE Xplore: 28 August 2014
Electronic ISBN:978-1-4799-2003-7

ISSN Information:

Conference Location: Sydney, NSW, Australia

References

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