Detection and coding schemes for parallel interference in resistive memories | IEEE Conference Publication | IEEE Xplore

Detection and coding schemes for parallel interference in resistive memories


Abstract:

This paper studies the problem of reliable resistive-memory readout through the rigorous lens of communication theory. The most dominant reliability issue in resistive me...Show More

Abstract:

This paper studies the problem of reliable resistive-memory readout through the rigorous lens of communication theory. The most dominant reliability issue in resistive memory can be modeled as interference of resistances in parallel to a measured resistance. For this special type of interference we develop detection and coding schemes that are shown to effectively mitigate the effects of sneak-path errors. The uniqueness of this study is that the proposed models combine theoretical rigor with practical richness, hence enabling deep contributions to very real problems.
Date of Conference: 21-25 May 2017
Date Added to IEEE Xplore: 31 July 2017
ISBN Information:
Electronic ISSN: 1938-1883
Conference Location: Paris, France

References

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