Loading [MathJax]/extensions/MathZoom.js
Deadlock-free routing and component placement for irregular mesh-based networks-on-chip | IEEE Conference Publication | IEEE Xplore

Deadlock-free routing and component placement for irregular mesh-based networks-on-chip


Abstract:

Routing is one of the most crucial key factors which decides over the success of NoC architecture based systems or their failure. This paper uses well known principles fr...Show More

Abstract:

Routing is one of the most crucial key factors which decides over the success of NoC architecture based systems or their failure. This paper uses well known principles from parallel computer architecture to develop a deadlock free highly adaptive routing algorithm for a 2D-mesh based network-on-chip (NoC) architecture including oversized IP cores. The paper consists of a short introduction into related routing theories and then gives a detailed description of the developed routing scheme. The last part is dedicated to a new floorplanning method, which allows to generate high density layouts suitable for the presented routing algorithm.
Date of Conference: 06-10 November 2005
Date Added to IEEE Xplore: 19 December 2005
Print ISBN:0-7803-9254-X

ISSN Information:

Conference Location: San Jose, CA, USA

Contact IEEE to Subscribe

References

References is not available for this document.