Using sampling patterns is always a powerful method to save efforts for the problems with large input space since it can quickly help identify cases' properties. The meaning behind these sampling results can be informative and useful, but these results may be unreadable to humans. Therefore, in 2019 CAD Contest [1], we formulate a problem of “logic regression on high dimensional Boolean space”. Given a blackboxed input-output relation generator, contestants are required to find a minimal Boolean logic circuit which matches the input-output relations of the given generator. In this contest, we provide benchmarks that address industrial applications of logic regression with several scenarios and different scales of input space to evaluate contestants' algorithms. We expect that the contest results can help industrial application and attract interesting academic research.