Accelerate Logic Re-simulation on GPU via Gate/Event Parallelism and State Compression | IEEE Conference Publication | IEEE Xplore

Accelerate Logic Re-simulation on GPU via Gate/Event Parallelism and State Compression


Abstract:

In this paper, we propose a logic re-simulation method on GPU via gate/event parallelism and state compression. We achieve 2-dimensional parallelism on GPU through groupi...Show More

Abstract:

In this paper, we propose a logic re-simulation method on GPU via gate/event parallelism and state compression. We achieve 2-dimensional parallelism on GPU through grouping gates and splitting events. Furthermore, we compress the states to reduce the communication overhead. Asynchronous communication between GPU and CPU is used to hide the latency of dumping results. Compared with the first place of problem C of ICCAD contest 2020, the proposed method can be 47.1 % better on the speedup of single design and 10.5% better on the geometric mean of speedup for all the benchmarks.
Date of Conference: 01-04 November 2021
Date Added to IEEE Xplore: 23 December 2021
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Conference Location: Munich, Germany

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